Responsibilities:
• Bachelor/ Masters Degree in Electrical/Computer Engineering
• Min 2 years of physical design experience
• Block experience with Synopsys ICC (preferred) or Cadence/Magma tools.
• Have at least 1 tapeout based on partition block from netlist to GDS.
• Block implementation skillset should include knowledge in the following areas.
• Floor-planning, placement, Clock tree synthesis, routing, RC extraction, timing and power optimization.
• Physical Design experience in ARM based blocks implementation (ARM7, ARM9, ARM11) is a plus.
Requirements:
• Candidate must possess at least a Diploma, Advanced/ Higher/Graduate Diploma, Bachelor's Degree, Post Graduate Diploma, Professional Degree, Master's Degree, Engineering (Computer/ Telecommunication), Engineering (Electrical/Electronic), Engineering (Others) or equivalent.
• Required skill(s): Backend, Physical, ASIC, timing, STA, timing analysis.
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